Semicon India Programme boosts domestic Chip Manufacturing and Design Ecosystem
Published: Mar 26, 2026
By TIOLCorplaws News Service
NEW DELHI, MAR 26, 2026: GOVERNMENT of India launched IndiaAI mission with outlay of Rs. 10,372 crore for the development of the overall AI ecosystem in the country. With India's push to democratise Artificial Intelligence and expand compute capacity, along with the rapid growth of data centres and cloud infrastructure, there has been a corresponding increase in demand for high-performance compute resources, including Graphics Processing Units (GPUs). Under the IndiaAI Mission, more than 38 thousand GPUs for common compute facility have been onboarded through the AI compute portal, which are being provided to Indian start-ups and academia at an affordable rate. GPUs are highly advanced equipment and are primarily manufactured in one country.
Total 190 projects have been approved under the IndiaAI Mission. Out of these 78 projects are with Government entities, 46 projects are with Startups & MSMEs, 30 projects are with early-stage startups, 27 projects are with Researchers or academia, 5 projects are with students, and 4 projects are with early-stage researchers.
To strengthen indigenous capabilities in HPC (High Performance Computing) and AI, the design and development of processors, GPGPUs (General-Purpose Graphics Processing Units), and accelerators, the projects under NSM (National Supercomputing Mission) have been initiated based on the RISC-V open-source instruction set architecture.
Guided by Hon'ble PM vision, Government has introduced Semicon India Programme for the development of semiconductor and display manufacturing ecosystem in the country. 10 Semiconductor manufacturing units have been approved under the Programme. Out of this, commercial production from 1 unit and pilot production from 3 units has already been started. Tata Electronics Private Limited (TEPL) is setting up a Semiconductor Fab facility in Gujarat with an investment of Rs. 91,526 crore. The targeted Technology Nodes are from 110 nm to 28 nm with a proposed total capacity of 50,000 Wafer Starts Per Month (WSPM).
The Government is promoting semiconductor design capabilities through the Design Linked Incentive (DLI) Scheme, which aims to support domestic companies, start-ups, and MSMEs in designing semiconductor IP cores, ASICs (Application-Specific Integrated Circuits), SoCs (System on Chip), and semiconductor-linked designs through a three-tier framework, comprising:
i. Design Infrastructure Support with access to EDA tools, IP cores, MPW services, and prototyping facilities;
ii. Product Design Linked Incentive offering reimbursement of up to 50% of eligible project costs, capped at Rs. 15 crore per application; and
iii. Deployment Linked Incentive providing reimbursement of net sales turnover ranging from 6% to 4% over five years, capped at Rs. 30 crore per application.
Under the DLI Scheme:
i. 24 projects have been approved for the design of semiconductor chips and SoCs for sectors such as video surveillance, drone detection, energy metering, microprocessors, satellite communications, and broadband and IoT SoCs. Out of these, 14 companies have raised venture capital funding to scale up and productize their solutions.
ii. 103 fabless chip design companies have been supported with access to advanced chip design infrastructure.
iii. 7 chips have been successfully fabricated out of 16 designs taped out across multiple foundries, including advanced nodes such as 12 nm at TSMC.
iv. 10 patents have been filed, and 140+ reusable semiconductor IP cores developed, serving as critical enablers for advanced chip design.
This information was submitted by Union Minister of State for Electronics and Information Technology Jitin Prasada in Lok Sabha on 25.03.2026.
