DPIIT signs MoU with Pfizer Limited to strengthen India's healthcare innovation ecosystem (See 'Corp Brief') NHAI imparts training to its Road Safety Officers (See 'Corp Brief') NITI Aayog organizes workshop on Coal Gasification Technology (See 'Corp Brief') Semicon India 2025 showcases Indian Startups accelerating Aatmanirbhar Chips (See 'Corp Brief') Ministry of Coal hosts Star Rating Award Ceremony in Mumbai (See 'Corp Brief') IPR - Mere access of 'passive' website, offering for sale products allegedly infringing trademark of registered proprietor, is not sufficient to confer territorial jurisdiction on it: HC (See 'Legal Desk') India develops Material for enhanced Anti-Doping Testing in Sports (See 'Corp Brief') One-time, One-way Switch facility from UPS to NPS made available to govt employees (See 'Corp Brief') Scindia reviews quarterly Financial Performance of Telecom PSUs (See 'Corp Brief') ICMR committed to strengthening India's MedTech Ecosystem (See 'Corp Brief') IPR - Merely changing first part of Impugned Trade Mark and using 'distinguishing family name or characteristic' is likely to cause confusion in market: HC (See 'Legal Desk') Goyal meets German Foreign Minister Dr. Johann David Wadephul (See 'Corp Brief') Companies Act - NCLT has jurisdiction to examine allegations of fraud and validity of documents in oppression and mismanagement cases: SC (See 'Legal Desk') Planning Group under PM GatiShakti evaluates key Infrastructure projects (See 'Corp Brief') NI Act - Existence of restraint order u/s 22A of SICA does not, by itself, bar proceedings u/s 138: SC (See 'Legal Desk') Ministry of Coal to host Star Rating Awards Ceremony for Coal & Lignite Mines (See 'Corp Brief') Misc - National Green Tribunal cannot function like mere rubber stamp by outsourcing its responsibilities to external committees: SC (See 'Legal Desk') Minister reviews preparedness for Cotton MSP Operations for Kharif Season 2025-26 (See 'Corp Brief') A&C - Contractual clause barring interest on delayed payments does not prevent arbitral tribunal from awarding pendente lite interest: SC (See 'Legal Desk') Govt committed to State-Specific SOPs for Ayush Integration: Jadhav (See 'Corp Brief') NI Act - Once complainant signs compromise deed acknowledging receipt of full settlement amount, then conviction u/s 138 cannot hold water: SC (See 'Legal Desk') CCI okays acquisition of voting rights of YES Bank by Sumitomo Mitsui (See 'Corp Brief') Kapas Kisan app empowers farmers with self-registration, slot booking and payment tracking (See 'Corp Brief') Misc - Culmination of trial will take time and rival contention raised by parties may give rise to debatable issues; Further detention of petitioner as undertrial is not warranted: HC (See 'Legal Desk') India MedTech Expo 2025 to showcase India's Strength and Innovation (See 'Corp Brief') PMLA - If liability of a dissolved company survives u/s 250 of the Companies Act for discharging obligations, then criminal liability should also be capable of enforcement: HC (See 'Legal Desk') Swachh Bharat Mission Grameen focuses on sustainability & community ownership (See 'Corp Brief') Ministry of Tribal Affairs launches Beta Version of Adi Vaani – India's 1st AI-Powered Translator (See 'Corp Brief') Procurement of foodgrains in Kharif Marketing Season (KMS) 2025-26 (Kharif Crops) for central pool main agenda (See 'Corp Brief') T.C.A. Kalyani assumes charge as Controller General of Accounts (See 'Corp Brief') IPR - In deciding question of similarity between two marks, marks have to be considered as whole: HC (See 'Legal Desk') IEPFA launches 'Niveshak Didi - Phase II' (See 'Corp Brief') India Post Payments Bank Celebrates 8th Foundation Day (See 'Corp Brief') Chouhan holds high-level meeting on grievance redressal of farmers (See 'Corp Brief') IPR - It is not necessary that in order to constitute infringement, impugned trademark should be absolute replica of registered trademark: HC (See 'Legal Desk') Sonowal credits PM SVANidhi for empowering small traders, slams Congress (See 'Corp Brief') Union Minister announces Nutritional Supplement Testing Referral Lab (See 'Corp Brief') IPR - Visual and phonetic similarity and used for identical goods under same Class, amounts to cancellation of trademark registration: HC (See 'Legal Desk') Centre asks States to Fast-Track Cleanup of Dirty Spots (See 'Corp Brief') Railways to commemorate 350th Martyrdom Day of Guru Tegh Bahadur Ji (See 'Corp Brief') SEBI - Adjudication Proceedings initiated against HDFC Securities Limited are disposed of in terms of Section 15JB, if RST was in line with the recommendations of IC: SEBI (See 'Legal Desk') Board to Report what's Right what's Not (See CORP EINSICHT)

Semicon India 2025 showcases Indian Startups accelerating Aatmanirbhar Chips

Published: Sep 05, 2025

By TIOLCorplaws News Service

NEW DELHI, SEPT 05, 2025: ON Day 2 of Semicon India 2025, held at Yashobhoomi in New Delhi, Prime Minister Narendra Modi visited the exhibition stalls. He was accompanied by Minister of Electronics and Information Technology, Ashwini Vaishnaw and Minister of State for Electronics and Information Technology, Jitin Prasada. During his visit, the Prime Minister underscored the pivotal role of startups in propelling India's semiconductor ambitions and importance of Indian Intellectual Property(IP) creation.

DLI-backed Startups Showcase Chip Design Self-Reliance at Semicon India 2025

Backed by the Government of India's Design Linked Incentive (DLI) Scheme, domestic chip design and IPR is accelerating across critical sectors, from surveillance and energy metering to networking and motor control. To date, 23 chip design projects have been sanctioned under the DLI Scheme, with 72 companies gaining access to industry-grade Electronic Design Automation (EDA) tools. Many of these startups showcased their roadmaps at Semicon India 2025, reflecting India's growing capability and self-reliance in semiconductor chip design.

New System-on-Chip Platforms Demonstrate India's Advancements in Chip Design Automation

Breakthrough RISC-V Based SoC Generator Platform

InCore Semiconductors, founded by the creators of the SHAKTI Processors - the first open-source RISC-V processor in India - has launched an innovative System-on-Chip (SoC) Generator Platform that reduces frontend chip design time from months to just a few minutes. This automation accelerates development timelines, lowers costs, and minimizes design risks, enabling faster innovation cycles of their customers.

A test chip taped out on TSMC's 40nm process node showcases six heterogeneous RISC-V cores from InCore's IP portfolio, a custom Network-on-Chip (NoC) with automatic protocol bridging, multiple automatically integrated peripherals, and a fully deployed software stack including an Real Time Operating System (RTOS), underscoring the platform's robustness. InCore offers a diverse RISC-V processor portfolio with three specialized families tailored to different application needs, featuring extensive customization options:

- Azurite delivers ultra-low power consumption with rapid interrupt response and deterministic timing, making it ideal for motor control, battery-operated devices, and precise real-time control.

- Calcite balances power and performance for mid-tier embedded applications such as POS terminal, IP camera, and smart IoT devices, optimizing energy efficiency for mainstream use cases.

- Dolomite, currently under development, is designed to provide high-performance vector processing and hardware virtualization to support complex, multi-workload environments typical in networking and edge AI.

Networking and Broadband solutions

Aheesa Digital Innovations will make available its SoC along with reference platforms to Original Equipment Manufacturer(OEMs) and Original Design Manufacturers (ODM)s in first quarter of 2026, enabling them to develop custom networking and broadband solutions using a 100% indigenously designed, Made-in-India SoC. The Vihaan SoC is built around the 64-bit C-DAC RISC-V based VEGA processor and includes Secure Boot and advanced security enhancements. It also features essential network interfaces and standard connectivity options such as PCIe 3.0, USB 3.0, and others required for broadband and network communications.

Surveillance and CCTV cameras

Four Indian companies, 3rdiTech, Netrasemi, BigEndian Semiconductors, and Mindgrove Technologies, are designing indigenous SoC solutions for critical applications such as surveillance and CCTV cameras. Having successfully taped out test chips in 2025, these companies underscore India's growing expertise and self-reliance in semiconductor technology. Collectively, they have raised over Rs.300 crore in VC funding (including funding support from DLI Scheme) at a combined valuation exceeding Rs.1,000 crore, aimed at scaling up operations and developing production-grade variants of their CCTV solutions, scheduled for launch in 2026.

Smart Energy Meters

MosChip Technologies developing Vidyut, a fully indigenous Smart Energy Meter chip and has successfully validated key IPs, including the Power Management Unit, Temperature Sensor, Clock Management Unit, and LCD Panel Controller, on a 180nm test chip, with packaging done by SCL Mohali. MosChip plans to make Vidyut completely indigenous, including its fabrication, supporting India's push for self-reliance in semiconductor chip design by 2026.

Motor Control

Vervesemi is targeting volume production of its indigenous chips and SoCs by late 2026 to early 2027, with a strong pipeline of application-specific ICs for Brushless Direct Current (BLDC) motor control, precision motor-control for EVs and drones, smart energy metering, and next-gen weighing systems. Additionally, advanced Application-Specific Integrated Circuits (ASICs) for space-grade data acquisition are in the works with ISRO replacing several imported components, with engineering samples expected between late 2025 and 2026, positioning them as a key player in reducing import dependence and enabling self-reliant electronics in critical sectors.

4G-LTE modem chipset

MBit Wireless has indigenously developed a 4G-LTE modem chipset with a complete protocol stack software, successfully certified by the Global Certification Forum (GCF) and LG labs. The chipset is being field tested with major Indian telecom companies for exploring adoption.

Under the leadership of Prime Minister Narendra Modi,  India is now moving beyond the backend to become a full-stack semiconductor nation. These domestic fabless chip design companies and others supported under the DLI Scheme together are advancing the vision of India's ambition of designing chips in India for the world.

About RISC V

RISC-V is a free, open standard, and modular instruction set architecture (ISA) based on the principles of Reduced Instruction Set Computer (RISC).  Developed at UC Berkeley, it provides unprecedented design freedom by being open and royalty-free, allowing anyone to design and use custom processors for a vast range of applications, from embedded systems to supercomputers, and fostering innovation in areas like AI, IoT, and data centers.

About SoC Generator Platform

A System-on-Chip (SoC) Generator Platform is a specialized, automated tool or environment that streamlines the design, integration, and verification of a System-on-Chip. SoC is an integrated circuit that compresses all of a system's required components onto one piece of silicon. These platforms automate complex and time-consuming aspects of chip design, such as integrating various intellectual property (IP) cores (like CPUs, GPUs, memory, and peripherals) and ensuring functional correctness. By doing so, they significantly reduce the design cycle, from concept to silicon-ready, making SoC development more efficient, accessible, and potentially error-free.

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