World IP day - Govt announces 3-year fee waiver for sports-related IP registrations (See 'Corp Brief') IBC - Minimum default threshold u/s 4 is met in case involving operational debt denominated in foreign currency, if foreign currency amount is converted into Indian Rupees with reference to exchange rate prevailing on date of invoice: NCLT (See 'Legal Desk') Govt organizes workshop on developing critical minerals value chain (See 'Corp Brief') Competition Act - Tender conditions & eligibility criteria are primarily within procurer's domain and, absent evidence that such clauses restricts competition or cause exclusionary harm, no intervention is warranted: CCI (See 'Legal Desk') TRAI releases Consultation Paper on 'Proliferation of Public Wi-Fi Networks in India' (See 'Corp Brief') DoP and DTDC sign MoU to strengthen Logistics and E-Commerce in India (See 'Corp Brief') Trade Mark - Defendants' conduct of running a coordinated fraudulent recruitment scheme, impersonating the plaintiffs & extracting money from each candidate, is deliberate exploitation of plaintiffs' goodwill & causes reputational harm: HC (See 'Legal Desk') PDUNASS-Gujarat NLU launch Programme on Labour Law and Social Security Compliance (See 'Corp Brief') Shivraj to launch PMGSY-IV Batch-II in Srinagar (See 'Corp Brief') India emphasises Inclusive and Ecosystem Based Governance of Small Scale Fisheries (See 'Corp Brief') SAFEMA - Certain transaction falls within ambit of benami transaction where appellants failed to produce supporting material, despite opportunity, to establish legitimate source of funds either in hands of lender or alleged contributors: SAFEMA TRIBUNAL (See 'Legal Desk') Diaspora vital connectors between India and global innovation ecosystems: MoS (See 'Corp Brief') Srinagar Khel Sankalp affirms unified commitment to athlete-centric sports ecosystem (See 'Corp Brief') IBC - If corporate debtor is solvent & functioning company, then insolvency process invoked only to secure payment of individual dues by initiation of CIRP, amounts to misuse of IBC as recovery mechanism: SC (See 'Legal Desk') Reining in Misuse of IBC for Recovery (See CORP EINSICHT) SAMAVESH Portal, NMBA 2.0, SETU and SMILE Beggary Apps Launched at Chandigarh Shivir (See 'Corp Brief') PMLA - Attachment of a residential property upheld where Act itself permits attachment not only of property directly acquired from proceeds of crime, but also of untainted property representing equivalent value where actual proceeds of crime are unavailable or untraceable: HC (See 'Legal Desk') Veep urges Youth to become Job Creators and Nation-Builders (See 'Corp Brief') CCIC launches 'Soul Threads' - A Heritage Designer Collection Celebrating Artisanal Legacy (See 'Corp Brief') IBC - If statutory authority, during subsistence of moratorium u/s 14, directs bank to place lien on bank accounts of Corporate Debtor, and bank acts on same, it would amount to execution against Corporate Debtor and is barred by Sec 14: NCLT (See 'Legal Desk')

Govt creating environment for Semiconductor Design Community

Published: Nov 27, 2024

By TIOLCorplaws News Service

NEW DELHI, NOV 27, 2024: CHIPIN Centre, one of the largest facilities established at C-DAC, offers an extensive range of semiconductor design workflows and solutions, striving to bring national chip design infrastructure directly to the semiconductor design community across the country. It is a centralized facility which hosts the most advanced tools for the entire chip design cycle (going up to 5 nm or advanced node).

It also offers compute and hardware infrastructure, IP cores, and expertise to provide comprehensive services for design fabrication at the SCL foundry and packaging to academic institutions under C2S (Chips to Start-up) Programme and DLI (Design Linked Incentive) Scheme of Ministry of Electronics and IT, Government of India.

Charkha to Chips: Atmanirbhar Bharat

Presently engaged with an estimated number of 20,000+ students at 250+ academic institutions and entrepreneurs at 45 start-up projects, ChipIN Centre aims to provide access of state-of-the-art EDA ( electronic design automation ) tools to 85,000 students at B.Tech, M.Tech and PhD level to design semiconductor chips within 5 years to meet the objectives of Atmanirbhar Bharat. List of institutions getting access of EDA Tools is at https://c2s.gov.in/EDA_Tool_Support.jsp

Considering the growing demand for EDA tools from Siemens amongst researcher & opportunity to scale the established infrastructure at ChipIN Centre, Siemens has extended the current usage scope of its EDA tools from 120 colleges to 250+ colleges under Chips to Start-up (C2S) Programme and latest powerful Veloce™ hardware-assisted verification solution from Siemens, to the companies approved under the DLI Scheme.

Veloce to address SoC and IC Design challenges

Veloce from Siemens comprising of the following main components - Veloce Strato hardware & OS, Veloce Apps and Veloce Protocol Solutions, has a compute facility of 128 CPU cores and capacity of 640 million gates. This addresses the verification and validation challenges faced by designers of complex SoCs (system on a chips) & highly sophisticated IC (integrated circuit) designs. Details can be seen at https://vegaprocessors.in/hep.php

ChipIN centre to boost India's Semiconductor Vision

"We were receiving the huge demand from students, researchers, faculty members & entrepreneurs across the country in respect of further enhancing & extending the EDA & design solutions from Siemens to more organizations. The enhanced support from Siemens at the ChipIN Centre will play a crucial role in fulfilling the vision of turning India into a semiconductor powerhouse." said Ms. Sunita Verma, Group Coordinator (R&D in Electronics & IT), Ministry of Electronics and IT.

Empowering next gen for a Self-Sustaining Semiconductor Ecosystem

"India today presents a significant opportunity for aspiring entrepreneurs and researchers to be at the forefront of designing and redefining the semiconductor systems, devices and products of the future. Siemens is proud to extend its participation in the "Chips to Start-up (C2S) Programme" of Government of India and MeitY by expanding access of its state-of-the-art EDA technology solutions to 250 educational institutions across India. Our contribution is a testament of alignment with the nation's unwavering commitment to building a robust and self-sustaining semiconductor ecosystem by empowering the next generation of engineers, researchers and entrepreneurs to drive India's technological advancements and propel the nation towards becoming a global powerhouse." - Ruchir Dixit, Vice President & Country Manager, EDA, Siemens Digital Industries Software.

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