Prasada inaugurates STQC Lab Automation Portal 'SATYA' (See 'Corp Brief') Indian Delegation visits Vietnam to Open New Opportunities in Silk, Sericulture & Handloom (See 'Corp Brief') Paswan releases Plastic Industry Status Report 2025 (See 'Corp Brief') Trade Mark - prior user rights override subsequent registration, particularly where adoption of deceptively similar subsequent trade mark, is not bona fide & is aimed at riding on existing goodwill of existing trade mark: HC (See 'Legal Desk') CCI registered 54 cases of anti-competitive practices in 2025 (See 'Corp Brief') National Institute of Ayurveda reaffirms role as global centre for education & patient care (See 'Corp Brief') Electronic Interlocking rolled out at 34 Railway Stations of N-E (See 'Corp Brief') PMLA - Objectives of enacting PMLA 2002, was attachment and confiscation of proceeds of crime which is quintessence so as to combat evil of money-laundering: SAFEMA (See 'Legal Desk') Khelo India Multipurpose Hall at SAI Sambhajinagar is addition to Olympic readiness: MoS (See 'Corp Brief') PM addresses community programme in Kuala Lumpur (See 'Corp Brief') A & C - mandate of arbitrators appointed unilaterally by one party, merits being terminated, where the other party explicitly refuses to waive applicability of Section 12(5) of the Act: HC (See 'Legal Desk') India-US Trade Agreement: Major boost for Textile Industry (See 'Corp Brief') IBC - In unavailability of adequate document/information and considering effect of limitation period, assigning of 'zero' value to trade receivables, without any due justification, is not appropriate: IBBI (See 'Legal Desk') India has signed MoUs with 23 countries for cooperation on Digital Public Infrastructure (See 'Corp Brief') A&C - Once arbitral tribunal has adopted plausible & reasonable interpretation of facts and contractual terms, courts cannot re-appreciate evidence or sit in appeal over award: SC (See 'Legal Desk') Railways inspects All Bridges Twice a Year (See 'Corp Brief') A&C - Permitting a civil suit to challenge an award confirmed by the Supreme Court would undermine the arbitral framework and public confidence in arbitration: HC (See 'Legal Desk') Over 1.25 lakh Livestock Farmers joined Virtual Awareness Program: MoS (See 'Corp Brief') A & C - Referral court not required to conduct detailed or contested inquiry & must limit itself to ascertaining whether underlying contract contains an arbitration clause covering disputes between the parties: HC (See 'Legal Desk') Pariksha Pe Charcha marks First-Ever multi-location nationwide engagement (See 'Corp Brief') SEBI - If Noticee violated regulation 23(1) and 23(4) of LODR Regulations as alleged in SCN, Noticee is liable for payment of monetary penalty in terms of section 15HB of SEBI Act: SEBI (See 'Legal Desk') TRAI issues Telecommunication Services Interconnection Regulations, 2026 (See 'Corp Brief') Trade Marks - Procedural defects & inadvertent errors which are curable should not be permitted to defeat substantive rights, unless shown to be deliberate, mala fide, or prejudicial to opposite party: HC (See 'Legal Desk') The Securities Markets Code, 2025: Strengthened Enforcement, Weakened Accountability? (See 'CORP EINSICHT')

Print

Govt creating environment for Semiconductor Design Community

Published: Nov 27, 2024

By TIOLCorplaws News Service

NEW DELHI, NOV 27, 2024: CHIPIN Centre, one of the largest facilities established at C-DAC, offers an extensive range of semiconductor design workflows and solutions, striving to bring national chip design infrastructure directly to the semiconductor design community across the country. It is a centralized facility which hosts the most advanced tools for the entire chip design cycle (going up to 5 nm or advanced node).

It also offers compute and hardware infrastructure, IP cores, and expertise to provide comprehensive services for design fabrication at the SCL foundry and packaging to academic institutions under C2S (Chips to Start-up) Programme and DLI (Design Linked Incentive) Scheme of Ministry of Electronics and IT, Government of India.

Charkha to Chips: Atmanirbhar Bharat

Presently engaged with an estimated number of 20,000+ students at 250+ academic institutions and entrepreneurs at 45 start-up projects, ChipIN Centre aims to provide access of state-of-the-art EDA ( electronic design automation ) tools to 85,000 students at B.Tech, M.Tech and PhD level to design semiconductor chips within 5 years to meet the objectives of Atmanirbhar Bharat. List of institutions getting access of EDA Tools is at https://c2s.gov.in/EDA_Tool_Support.jsp

Considering the growing demand for EDA tools from Siemens amongst researcher & opportunity to scale the established infrastructure at ChipIN Centre, Siemens has extended the current usage scope of its EDA tools from 120 colleges to 250+ colleges under Chips to Start-up (C2S) Programme and latest powerful Veloce™ hardware-assisted verification solution from Siemens, to the companies approved under the DLI Scheme.

Veloce to address SoC and IC Design challenges

Veloce from Siemens comprising of the following main components - Veloce Strato hardware & OS, Veloce Apps and Veloce Protocol Solutions, has a compute facility of 128 CPU cores and capacity of 640 million gates. This addresses the verification and validation challenges faced by designers of complex SoCs (system on a chips) & highly sophisticated IC (integrated circuit) designs. Details can be seen at https://vegaprocessors.in/hep.php

ChipIN centre to boost India's Semiconductor Vision

"We were receiving the huge demand from students, researchers, faculty members & entrepreneurs across the country in respect of further enhancing & extending the EDA & design solutions from Siemens to more organizations. The enhanced support from Siemens at the ChipIN Centre will play a crucial role in fulfilling the vision of turning India into a semiconductor powerhouse." said Ms. Sunita Verma, Group Coordinator (R&D in Electronics & IT), Ministry of Electronics and IT.

Empowering next gen for a Self-Sustaining Semiconductor Ecosystem

"India today presents a significant opportunity for aspiring entrepreneurs and researchers to be at the forefront of designing and redefining the semiconductor systems, devices and products of the future. Siemens is proud to extend its participation in the "Chips to Start-up (C2S) Programme" of Government of India and MeitY by expanding access of its state-of-the-art EDA technology solutions to 250 educational institutions across India. Our contribution is a testament of alignment with the nation's unwavering commitment to building a robust and self-sustaining semiconductor ecosystem by empowering the next generation of engineers, researchers and entrepreneurs to drive India's technological advancements and propel the nation towards becoming a global powerhouse." - Ruchir Dixit, Vice President & Country Manager, EDA, Siemens Digital Industries Software.

TIOL CORP SEARCH

TIOL GROUP WEBSITES

taxindiaonline
taxindiainternational
tioltube
TKF
TIOLawards
A TIOL Website. Copyright © 2025 TIOLcorplaws.com All rights reserved.