TRAI issues amended 'Rating Manual 2026' for assessment of Digital Connectivity (See 'Corp Brief') Zojila Tunnel to establish All-Weather Connectivity Between J&K and Ladakh (See 'Corp Brief') IPR - Foreign FRAND rate-setting action filed by implementer may be treated as relevant material at pro tem stage in assessing prima facie essentiality / need for licensing: HC (See 'Legal Desk') Ministry of MSME Promoting Inclusive Entrepreneurship through National SC-ST Hub Scheme (See 'Corp Brief') GeM Boosts MSE Inclusion: Registered Units Rise to 11.9 Lakh (See 'Corp Brief') Strong, transparent and modern cooperative institutions will energise rural economy: Bhutani (See 'Corp Brief') Trade Marks - CALPOL & CALPOL FAST medicines granted status of well-known trademark as material demonstrates strong consumer association of mark with Plaintiff & its distinctiveness in pharma sector: HC (See 'Legal Desk') SAIL sharpens strategic priorities for FY27, reinforces market position (See 'Corp Brief') Railways sanctions upgradation of Electric Traction System on Bengaluru-Tumkur Section (See 'Corp Brief') IBC - Once resolution plan was approved by CoC, successful resolution applicant is bound by it and cannot seek to evade implementation by raising objections to LoI stipulations that are inherent in process: SC (See 'Legal Desk') Railways sanctions upgradation of Electric Traction System on Mahbubnagar-Secunderabad Section (See 'Corp Brief') Capital Market - Finding of 'fraud' under SEBI PFUTP Regulations, 2003, cannot be sustained, if Securities Appellate Tribunal had committed 'egregious error' in affirming SEBI's conclusions on manipulation & fraudulent intent: SC (See 'Legal Desk') MoS inaugurates Self-ticketing Kiosks at National Zoological Park (See 'Corp Brief') Ministry of Panchayati Raj to organise outreach workshop on Atmanirbhar Panchayat Program (See 'Corp Brief') Mandaviya leads nationwide World Bicycle Day celebrations with actor Vikrant Massey (See 'Corp Brief') IPR - Nature of enquiry u/s 57, being one for cancellation or rectification of register, is founded upon appreciation of statutory parameters such as distinctiveness, prior use and likelihood of confusion: HC (See 'Legal Desk') MoS inaugurates Daycare Facility for Children of MSDE Employees at Kaushal Bhawan (See 'Corp Brief') National Biodiversity Authority Celebrates World Environment Day 2026 (See 'Corp Brief') AI-enabled Sayuj App & Open Challenge Program 1.0 launched to strengthen Startup Ecosystem: MoS (See 'Corp Brief') Over 6,000 youth from across country to celebrate innovation & leadership (See 'Corp Brief') IBC - Land leased by statutory authority cannot be excluded from Corporate Debtor's assets on ground that development rights were transferred without consent: NCLT (See 'Legal Desk') IBC's Primacy Over the Electricity Act and the Extinguishment of Pre-CIRP Claims (See CORP EINSICHT)

Print

Govt creating environment for Semiconductor Design Community

Published: Nov 27, 2024

By TIOLCorplaws News Service

NEW DELHI, NOV 27, 2024: CHIPIN Centre, one of the largest facilities established at C-DAC, offers an extensive range of semiconductor design workflows and solutions, striving to bring national chip design infrastructure directly to the semiconductor design community across the country. It is a centralized facility which hosts the most advanced tools for the entire chip design cycle (going up to 5 nm or advanced node).

It also offers compute and hardware infrastructure, IP cores, and expertise to provide comprehensive services for design fabrication at the SCL foundry and packaging to academic institutions under C2S (Chips to Start-up) Programme and DLI (Design Linked Incentive) Scheme of Ministry of Electronics and IT, Government of India.

Charkha to Chips: Atmanirbhar Bharat

Presently engaged with an estimated number of 20,000+ students at 250+ academic institutions and entrepreneurs at 45 start-up projects, ChipIN Centre aims to provide access of state-of-the-art EDA ( electronic design automation ) tools to 85,000 students at B.Tech, M.Tech and PhD level to design semiconductor chips within 5 years to meet the objectives of Atmanirbhar Bharat. List of institutions getting access of EDA Tools is at https://c2s.gov.in/EDA_Tool_Support.jsp

Considering the growing demand for EDA tools from Siemens amongst researcher & opportunity to scale the established infrastructure at ChipIN Centre, Siemens has extended the current usage scope of its EDA tools from 120 colleges to 250+ colleges under Chips to Start-up (C2S) Programme and latest powerful Veloce™ hardware-assisted verification solution from Siemens, to the companies approved under the DLI Scheme.

Veloce to address SoC and IC Design challenges

Veloce from Siemens comprising of the following main components - Veloce Strato hardware & OS, Veloce Apps and Veloce Protocol Solutions, has a compute facility of 128 CPU cores and capacity of 640 million gates. This addresses the verification and validation challenges faced by designers of complex SoCs (system on a chips) & highly sophisticated IC (integrated circuit) designs. Details can be seen at https://vegaprocessors.in/hep.php

ChipIN centre to boost India's Semiconductor Vision

"We were receiving the huge demand from students, researchers, faculty members & entrepreneurs across the country in respect of further enhancing & extending the EDA & design solutions from Siemens to more organizations. The enhanced support from Siemens at the ChipIN Centre will play a crucial role in fulfilling the vision of turning India into a semiconductor powerhouse." said Ms. Sunita Verma, Group Coordinator (R&D in Electronics & IT), Ministry of Electronics and IT.

Empowering next gen for a Self-Sustaining Semiconductor Ecosystem

"India today presents a significant opportunity for aspiring entrepreneurs and researchers to be at the forefront of designing and redefining the semiconductor systems, devices and products of the future. Siemens is proud to extend its participation in the "Chips to Start-up (C2S) Programme" of Government of India and MeitY by expanding access of its state-of-the-art EDA technology solutions to 250 educational institutions across India. Our contribution is a testament of alignment with the nation's unwavering commitment to building a robust and self-sustaining semiconductor ecosystem by empowering the next generation of engineers, researchers and entrepreneurs to drive India's technological advancements and propel the nation towards becoming a global powerhouse." - Ruchir Dixit, Vice President & Country Manager, EDA, Siemens Digital Industries Software.

TIOL CORP SEARCH

TIOL GROUP WEBSITES

taxindiaonline
taxindiainternational
tioltube
TKF
TIOLawards
A TIOL Website. Copyright © 2025 TIOLcorplaws.com All rights reserved.